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Altera-SDRAM_controller-IP-CORE
- ALTRA官方提供的SDRAM的控制内核，VHDL和VERILOG版本都有，希望对大家有用-The ALTRA official SDRAM control kernel, VHDL and VERILOG version have the hope that useful
sdramtest
- vhdl语言编写读写三星SDRAM程序，包含读写控制程序，地址转化程序，测试模块程序-vhdl language, reading and writing the Samsung SDRAM program, contains the read and write control procedures address conversion program, the test module program
Using_the_SDRAM_on_DE0_Board
- Using the SDRAM on Altera’s DE0 Board with VHDL Designs
fifo1k_32
- vhdljichu,完成vhdl中对sdram控制器的功能-vhdljichu, completed in vhdl sdram controller functions for
61EDA_C915
- altera公司的SDRAM 控制器的ip core源代码 里面包含verilog及vhdl两种语言编写的 方便选择-altera company SDRAM controller ip core source code which contains verilog and vhdl two kinds of language for easy selection
SDRAM_Modelsim
- 基于VHDL的SDRAM控制器源代码以及modesim验证工程的testbench-SDRAM controller based on VHDL source code and modesim verification testbench works
ddr3
- VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
ep2c8ptft
- EP2C8Q208 TFT LCD彩屏VHDL工程，含SDRAM、PLL等内容。-EP2C8Q208 TFT LCD color screen VHDL projects, including SDRAM, PLL and other content.
sdram_ctrl1
- 基于VHDL语言，实现了sdram控制器，已经过验证可用-design for sdram control